Performance Study and Analysis of Heterojunction Gate All Around Nanowire Tunneling Field Effect Transistor

In this paper, we have presented a heterojunction gate all around nanowiretunneling field effect transistor (GAA NW TFET) and have explained its characteristicsin details. The proposed device has been structured using Germanium for source regionand Silicon for channel and drain regions. Kane's band-to-band tunneling model hasbeen used to account for the amount of band-to-band tunneling generation rate per unitvolume of carriers which tunnel from valence band of source region to conduction bandof channel. The simulations have been carried out by three dimensional Silvaco Atlassimulator. Using extensive device simulations, we compared the results of presentedheterojunction structure with those of Silicon gate all around nanowire TFET. Whereasdue to thinner tunneling barrier at the source-channel junction which leads to theincrease of carrier tunneling rate, the heterojunction gate all around nanowire TFETshows excellent characteristics with high on-state current, superior transconductanceand high cut-off frequency.